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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-15 16:38:51 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-16 04:12:27 +0100
commitc5917079eb81b10c58cd3e7bfe6b3925baaf9241 (patch)
treee07ef6796762e1289430fa146f311d26c951aa65 /src/cpu/x86/lapic/apic_timer.c
parent8ca9a21a43ccc73b3f289affd2384805ec98eb81 (diff)
cpu/x86: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl: WARNING: line over 80 characters TEST=Build and run on Galileo Gen2 Change-Id: I56ea28826963403dc0719f40c13782c56dc97feb Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18844 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/x86/lapic/apic_timer.c')
-rw-r--r--src/cpu/x86/lapic/apic_timer.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c
index 829f51f2d9..cddc5ad575 100644
--- a/src/cpu/x86/lapic/apic_timer.c
+++ b/src/cpu/x86/lapic/apic_timer.c
@@ -127,7 +127,8 @@ void udelay(u32 usecs)
timer_fsb = get_timer_fsb();
}
- /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz */
+ /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz
+ */
ticks = usecs * timer_fsb;
start = lapic_read(LAPIC_TMCCT);
do {