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authorFelix Held <felix-coreboot@felixheld.de>2023-04-01 01:51:06 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-04-04 19:19:58 +0000
commitd801d00f23c138bfcd684f792f8c6ce870934543 (patch)
treeb4cfb949efd19fb24a550a8947c17a0c0387640c /src/cpu/x86/lapic/Makefile.inc
parentf008e0af165bc5ebedd1baabff896ddf9db21598 (diff)
cpu/x86/lapic,pae,tsc/Makefile: use all_x86 target
Use the newly introduced 'all_x86' make target to add the compilation unit to all stages that run on the x86 cores, but not to verstage on PSP. TEST=Timeless build for Mandolin results in identical image. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I181c3207bb1ebe9c5080ef3a3cdda8146ed05822 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74152 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86/lapic/Makefile.inc')
-rw-r--r--src/cpu/x86/lapic/Makefile.inc12
1 files changed, 2 insertions, 10 deletions
diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc
index 22bd987f03..308e9b2fa9 100644
--- a/src/cpu/x86/lapic/Makefile.inc
+++ b/src/cpu/x86/lapic/Makefile.inc
@@ -4,14 +4,6 @@ bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
postcar-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
-bootblock-y += boot_cpu.c
-verstage_x86-y += boot_cpu.c
-romstage-y += boot_cpu.c
-ramstage-y += boot_cpu.c
-postcar-y += boot_cpu.c
-bootblock-y += lapic.c
-verstage_x86-y += lapic.c
-romstage-y += lapic.c
-ramstage-y += lapic.c
-postcar-y += lapic.c
+all_x86-y += boot_cpu.c
+all_x86-y += lapic.c