arch/x86,cpu/x86: Introduce new method for accessing cpu_info

There is currently a fundamental flaw in the current cpu_info()
implementation. It assumes that current stack is CONFIG_STACK_SIZE
aligned. This assumption breaks down when performing SMM relocation.

The first step in performing SMM relocation is changing the SMBASE. This
is accomplished by installing the smmstub at 0x00038000, which is the
default SMM entry point. The stub is configured to set up a new stack
with the size of 1 KiB (CONFIG_SMM_STUB_STACK_SIZE), and an entry point
of smm_do_relocation located in RAMSTAGE RAM.

This means that when smm_do_relocation is executed, it is running in SMM
with a different sized stack. When cpu_info() gets called it will be
using CONFIG_STACK_SIZE to calculate the location of the cpu_info
struct. This results in reading random memory. Since cpu_info() has to
run in multiple environments, we can't use a compile time constant to
locate the cpu_info struct.

This CL introduces a new way of locating cpu_info. It uses a per-cpu
segment descriptor that points to a per-cpu segment that is allocated on
the stack. By using a segment descriptor to point to the per-cpu data,
we no longer need to calculate the location of the cpu_info struct. This
has the following advantages:
* Stacks no longer need to be CONFIG_STACK_SIZE aligned.
* Accessing an unconfigured segment will result in an exception. This
  ensures no one can call cpu_info() from an unsupported environment.
* Segment selectors are cleared when entering SMM and restored when
  leaving SMM.
* There is a 1:1 mapping between cpu and cpu_info. When using
  COOP_MULTITASKING, a new cpu_info is currently allocated at the top of
  each thread's stack. This no longer needs to happen.

This CL guards most of the code with CONFIG(CPU_INFO_V2). I did this so
reviewers can feel more comfortable knowing most of the CL is a no-op. I
would eventually like to remove most of the guards though.

This CL does not touch the LEGACY_SMP_INIT code path. I don't have any
way of testing it.

The %gs segment was chosen over the %fs segment because it's what the
linux kernel uses for per-cpu data in x86_64 mode.

BUG=b:194391185, b:179699789
TEST=Boot guybrush with CPU_INFO_V2 and verify BSP and APs have correct
%gs segment. Verify cpu_info looks sane. Verify booting to the OS
works correctly with COOP_MULTITASKING enabled.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I79dce9597cb784acb39a96897fb3c2f2973bfd98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57627
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

1 files changed, 47 insertions, 0 deletions

diff --git a/src/cpu/x86/cpu_info.S.inc b/src/cpu/x86/cpu_info.S.inc
index 62b47ca52a..dffd1bc346 100644
--- a/src/cpu/x86/cpu_info.S.inc
+++ b/src/cpu/x86/cpu_info.S.inc
@@ -8,3 +8,50 @@
 	push	\index	/* index */
 	push	$0	/* *cpu */
 .endm
+
+/* Push struct per_cpu_segment_data */
+.macro push_per_cpu_segment_data cpu_info_pointer=%esp
+	push	\cpu_info_pointer	/* *cpu_info */
+.endm
+
+/*
+ * Sets the base address in the segment descriptor array.
+ *
+ * A segment descriptor has the following structure:
+ *     struct {
+ *         uint16_t segment_limit_0_15;
+ *         uint16_t base_address_0_15;
+ *         uint8_t base_address_16_23;
+ *         uint8_t attrs[2];
+ *         uint8_t base_address_24_31;
+ *     };
+ *
+ * @desc_array: Address of the descriptor table
+ * @base: Address to set in the descriptor
+ * @desc_index: Index of the descriptor in the table. Defaults to 0. Must be a
+ *              register if specified.
+ *
+ * Clobbers %eax.
+ */
+.macro set_segment_descriptor_base desc_array:req, base:req, desc_index
+	mov	\base, %eax
+
+	push	%ebx /* preserve ebx */
+	mov	\desc_array, %ebx
+
+.ifb \desc_index
+	movw	%ax, 2(%ebx)
+	shr	$16, %eax
+	movb	%al, 4(%ebx)
+	shr	$8, %eax
+	movb	%al, 7(%ebx)
+.else
+	movw	%ax, 2(%ebx, \desc_index, 8)
+	shr	$16, %eax
+	movb	%al, 4(%ebx, \desc_index, 8)
+	shr	$8, %eax
+	movb	%al, 7(%ebx, \desc_index, 8)
+.endif
+
+	pop	%ebx
+.endm