Refactor copy_and_run so that it uses a single code base instead of

3 (with one of them way too much assembler code).

On the way, I had to make some changes to the way the code is built, 
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as 
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects 
lots of post-raminit code (memcpy doesn't really make sense before 
raminit, or at least CAR)

The coreboot_apc code (AMD boards) gained some .c includes because I 
don't know that part of the code enough to really rework it and only 
have limited possibilities to test it. The includes should give an 
identical situation for this part of the code.

This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 12 insertions, 72 deletions

diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c
index 7a070ee648..14fe83d667 100644
--- a/src/cpu/x86/car/copy_and_run.c
+++ b/src/cpu/x86/car/copy_and_run.c
@@ -1,83 +1,23 @@
-/* by yhlu 6.2005 
-	moved from nrv2v.c and some lines from crt0.S
-   2006/05/02 - stepan: move nrv2b to an extra file.
+/* Copyright (C) 2009 coresystems GmbH
+   (Written by Patrick Georgi <patrick.georgi@coresystems.de> for coresystems GmbH
 */
 
-#if CONFIG_COMPRESS
-#define ENDIAN   0
-#define BITSIZE 32
-#include "lib/nrv2b.c"
-#endif
+void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
+
+extern u8 _liseg, _iseg, _eiseg;
 
 static void copy_and_run(unsigned cpu_reset)
 {
 	uint8_t *src, *dst; 
-#if !CONFIG_COMPRESS
-	unsigned long dst_len;
-#endif
-        unsigned long ilen, olen;
-
-
-#if !CONFIG_COMPRESS 
-	print_debug("Copying coreboot to RAM.\r\n");
-	__asm__ volatile (
-		"leal _liseg, %0\n\t"
-		"leal _iseg, %1\n\t"
-		"leal _eiseg, %2\n\t"
-		"subl %1, %2\n\t"
-		: "=a" (src), "=b" (dst), "=c" (dst_len)
-	);
-	memcpy(src, dst, dst_len);
-#else 
-	print_debug("Uncompressing coreboot to RAM.\r\n");
-
-        __asm__ volatile (
-	        "leal _liseg, %0\n\t"
-	        "leal _iseg,  %1\n\t"
-                : "=a" (src) , "=b" (dst)
-        );
-
-#if CONFIG_USE_INIT		
-	printk_spew("src=%08x\r\n",src); 
-	printk_spew("dst=%08x\r\n",dst);
-#else
-        print_spew("src="); print_spew_hex32((uint32_t)src); print_spew("\r\n");
-        print_spew("dst="); print_spew_hex32((uint32_t)dst); print_spew("\r\n");
-#endif
-	
-//	dump_mem(src, src+0x100);
+        unsigned long ilen;
 
-	olen = unrv2b(src, dst, &ilen);
 
-#endif
-//	dump_mem(dst, dst+0x100);
-#if CONFIG_USE_INIT
-	printk_spew("coreboot_ram.bin length = %08x\r\n", olen);
-#else
-	print_spew("coreboot_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
-#endif
-#ifdef CONFIG_DEACTIVATE_CAR
-	print_debug("Deactivating CAR");
-#include CONFIG_DEACTIVATE_CAR_FILE
-	print_debug(" - Done.\r\n");
-#endif
-	print_debug("Jumping to coreboot.\r\n");
+	src = &_liseg;
+	dst = &_iseg;
+	ilen = &_eiseg - dst;
 
-	if(cpu_reset == 1 ) {
-		__asm__ volatile (
-			"movl $0xffffffff, %ebp\n\t"
-		);
-	}
-	else {
-                __asm__ volatile (
-                        "xorl %ebp, %ebp\n\t"
-                );
-	}
-	
-	__asm__ volatile (
-		"cli\n\t"
-		"leal    _iseg, %edi\n\t"
-		"jmp     *%edi\n\t"
-	);
+	if (cpu_reset == 1) cpu_reset = -1;
+	else cpu_reset = 0;
 
+	copy_and_run_core(src, dst, ilen, cpu_reset);
 }