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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-02-12 13:54:03 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-02-12 13:54:03 +0000 |
commit | d76d5791fd740af594578169217a1b47254f9f00 (patch) | |
tree | f7d9d3f9b3237bf1c6fb3a7da78f9d8878998270 /src/cpu/x86/cache | |
parent | 6a208781b4c199a5673ab8429cccf32bee39112f (diff) |
Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)
clause.
An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of
the chip on the DBM690T board.
Use decimal values for KELV, THOT and TCRT on the Pistachio board for
better readability.
Tested by Maggie Li on DBM690T and Pistachio.
Tested by Carl-Daniel Hailfinger on Asus M2A-VM.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/cache')
0 files changed, 0 insertions, 0 deletions