diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-07-24 12:48:22 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:04:08 +0000 |
| commit | 5a1e2d3f631a855c869efb1a43e721f7251904ea (patch) | |
| tree | 607988b27733ee08d53aaedd491e9702e26cb299 /src/cpu/x86/cache | |
| parent | 0b6f35d798ae03736b9b443ce7819676e9c6e562 (diff) | |
ec/google/chromeec: Fix loop off-by-one error in DPTF _OSC
The while loop in \_SB.DPTF._OSC accidentally used <= instead of <, so
there was an error indexing into IDSP.
BUG=b:162043345
TEST=verify disassembled ASL, as well as no BIOS bug mentioned in
/var/log/messages
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I08c4152c59cc9eb13386c825aab983681cfa88ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/cpu/x86/cache')
0 files changed, 0 insertions, 0 deletions