diff options
author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:28:22 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:39 +0000 |
commit | 0949e739066c3509e05db2b9ed71cefaaa62205f (patch) | |
tree | 797d772f524dd668689f8c2813f3b052e84de434 /src/cpu/x86/64bit | |
parent | 6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (diff) |
src/acpi to src/lib: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86/64bit')
-rw-r--r-- | src/cpu/x86/64bit/exit32.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/64bit/exit32.inc b/src/cpu/x86/64bit/exit32.inc index 91cccb535e..4d1149ee6c 100644 --- a/src/cpu/x86/64bit/exit32.inc +++ b/src/cpu/x86/64bit/exit32.inc @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * For droping from long mode to protected mode. + * For dropping from long mode to protected mode. * * For reference see "AMD64 ArchitectureProgrammer's Manual Volume 2", * Document 24593-Rev. 3.31-July 2019 Chapter 5.3 @@ -47,7 +47,7 @@ SetCodeSelector32: # use iret to jump to a 32-bit offset in a new code segment # iret will pop cs:rip, flags, then ss:rsp - mov %ss, %ax # need to push ss, but push ss instuction + mov %ss, %ax # need to push ss, but push ss instruction push %rax # not valid in x64 mode, so use ax push %rdx # the rsp to load pushfq # push rflags |