- Add new cvs code to cvs

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 99 insertions, 0 deletions

diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
new file mode 100644
index 0000000000..3d30a3f85f
--- /dev/null
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -0,0 +1,61 @@
+/* For starting linuxBIOS in protected mode */
+
+#include <arch/rom_segs.h>
+
+/* 	.section ".rom.text" */
+	.code32
+
+	.align	4
+.globl gdtptr
+
+gdt:
+gdtptr:
+	.word	gdt_end - gdt -1 /* compute the table limit */
+	.long	gdt		 /* we know the offset */
+	.word	0
+
+/* flat code segment */
+	.word	0xffff, 0x0000		
+	.byte	0x00, 0x9b, 0xcf, 0x00	
+	
+/* flat data segment */
+	.word	0xffff, 0x0000		
+	.byte	0x00, 0x93, 0xcf, 0x00	
+
+gdt_end:
+	
+
+/*
+ *	When we come here we are in protected mode. We expand 
+ *	the stack and copies the data segment from ROM to the
+ *	memory.
+ *
+ *	After that, we call the chipset bootstrap routine that
+ *	does what is left of the chipset initialization. 
+ *
+ *	NOTE aligned to 4 so that we are sure that the prefetch
+ *	cache will be reloaded.
+ */
+	.align	4
+.globl protected_start
+protected_start:
+
+	lgdt	%cs:gdtptr
+	ljmp	$ROM_CODE_SEG, $__protected_start
+	
+__protected_start:
+	/* Save the BIST value */
+	movl	%eax, %ebp
+
+	intel_chip_post_macro(0x10)	/* post 10 */
+
+	movw	$ROM_DATA_SEG, %ax
+	movw	%ax, %ds
+	movw	%ax, %es
+	movw	%ax, %ss
+	movw	%ax, %fs
+	movw	%ax, %gs
+
+	/* Restore the BIST value to %eax */
+	movl	%ebp, %eax
+
diff --git a/src/cpu/x86/32bit/entry32.lds b/src/cpu/x86/32bit/entry32.lds
new file mode 100644
index 0000000000..37a75ba6ae
--- /dev/null
+++ b/src/cpu/x86/32bit/entry32.lds
@@ -0,0 +1,14 @@
+/*
+	_cache_ram_seg_base = DEFINED(CACHE_RAM_BASE)? CACHE_RAM_BASE - _rodata : 0;
+	_cache_ram_seg_base_low    = (_cache_ram_seg_base) & 0xffff;
+	_cache_ram_seg_base_middle = (_cache_ram_seg_base >> 16) & 0xff;
+	_cache_ram_seg_base_high   = (_cache_ram_seg_base >> 24) & 0xff;
+
+	_rom_code_seg_base =  _ltext - _text;
+	_rom_code_seg_base_low    = (_rom_code_seg_base) & 0xffff;
+	_rom_code_seg_base_middle = (_rom_code_seg_base >> 16) & 0xff;
+	_rom_code_seg_base_high   = (_rom_code_seg_base >> 24) & 0xff;
+*/
+
+
+
diff --git a/src/cpu/x86/32bit/reset32.inc b/src/cpu/x86/32bit/reset32.inc
new file mode 100644
index 0000000000..42c68cc770
--- /dev/null
+++ b/src/cpu/x86/32bit/reset32.inc
@@ -0,0 +1,10 @@
+	.section ".reset"
+	.code16
+.globl	reset_vector
+reset_vector:
+
+	. = 0x8;
+	.code32
+	jmp	protected_start
+
+	.previous
diff --git a/src/cpu/x86/32bit/reset32.lds b/src/cpu/x86/32bit/reset32.lds
new file mode 100644
index 0000000000..fa6db86b1a
--- /dev/null
+++ b/src/cpu/x86/32bit/reset32.lds
@@ -0,0 +1,14 @@
+/*
+ *      _ROMTOP                 : The top of the rom used where we
+ *				  need to put the reset vector.
+ */
+
+SECTIONS {
+	_ROMTOP = _ROMBASE + ROM_IMAGE_SIZE - 0x10;
+	. = _ROMTOP;
+	.reset (.): {
+		*(.reset)
+		. = 15 ;
+		BYTE(0x00);
+	} 
+}