diff options
| author | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:36:06 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:36:06 +0000 |
| commit | f84926efca2f871fa557cccee36f0f773ec7190b (patch) | |
| tree | 669414cbe6344aa61839f37422c0e163eae4f0fa /src/cpu/x86/16bit | |
| parent | 1995f1af35b53b5c07694df7296f5eb20461b1c6 (diff) | |
tell people that the segment descriptors are different for ROMCC and
GCC code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/16bit')
| -rw-r--r-- | src/cpu/x86/16bit/entry16.inc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 61726d8ad9..674315fbd2 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -108,10 +108,10 @@ _start: /* Now that we are in protected mode jump to a 32 bit code segment. */ data32 ljmp $ROM_CODE_SEG, $__protected_start -/** The gdt has a 4 Gb code segment at 0x10, and a 4 GB data segment - * at 0x18; these are Linux-compatible. - */ - + /** + * The gdt is defined in entry32.inc, it has a 4 Gb code segment + * at 0x08, and a 4 GB data segment at 0x10; + */ .align 4 .globl gdtptr16 gdtptr16: |