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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-03 12:11:05 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-05 11:33:23 +0200
commitc06af9eb8b662f23a7f93ff781f7a5b5edefbb9c (patch)
treee9a88ecfa968ae72cce5e0e91137cf796f0d91df /src/cpu/via
parent8aeab56b102be493b7a592d45bb3646f8230e7be (diff)
Drop redundant select CACHE_AS_RAM
The few remaining boards without CAR override this with select ROMCC. Change-Id: Ifd5223e67f6a2dadb47846bdaab40b1be763cf69 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6172 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/via')
-rw-r--r--src/cpu/via/c7/Kconfig1
-rw-r--r--src/cpu/via/nano/Kconfig1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig
index 01fd408a49..10b52bb938 100644
--- a/src/cpu/via/c7/Kconfig
+++ b/src/cpu/via/c7/Kconfig
@@ -11,7 +11,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select MMX
select SSE2
- select CACHE_AS_RAM
config DCACHE_RAM_BASE
hex
diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig
index e81958592c..4242dd6a2c 100644
--- a/src/cpu/via/nano/Kconfig
+++ b/src/cpu/via/nano/Kconfig
@@ -30,7 +30,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select MMX
select SSE2
- select CACHE_AS_RAM
select SUPPORT_CPU_UCODE_IN_CBFS
config DCACHE_RAM_BASE