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author | Xiang Wang <wxjstz@126.com> | 2018-07-08 10:01:14 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-04 12:35:47 +0000 |
commit | 3b5351d0444f028ebdb5d06ee51197e516b0c31e (patch) | |
tree | 665f382c05c786bcd965308fb3a48ee099a58994 /src/cpu/ti | |
parent | 33354ddaa8bf067b86e283814fc3f03a02b1dfe5 (diff) |
riscv: add spin lock support
Add spin lock support for riscv.
Change-Id: I7e93fb8b35c4452f0fe3f7f4bcc6f7aa4e042451
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/cpu/ti')
0 files changed, 0 insertions, 0 deletions