diff options
| author | Julius Werner <jwerner@chromium.org> | 2018-04-27 15:19:51 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 06:26:41 +0000 |
| commit | c01a9ab56244dbb6d93e3be128ef1fadccc9ed2b (patch) | |
| tree | 2e78b3b628bcc3df0e141058850b66158fcdd3f3 /src/cpu/ti | |
| parent | 3775f1c0e177b3667753bbf0087b7975f3ec712e (diff) | |
cubieboard/qemu-armv7/am335x: Add fake TTB region for consistency
All ARM architecture boards are supposed to have a TTB region for their
page tables. ARM systems cannot use the data cache without enabling
paging, so it is imperative to do that as soon as possible. They will
also fault on unaligned accesses when not using the cache, which breaks
assumptions in CBFS code.
Unfortunately, we have some old boards in various stages of disrepair in
the tree that don't always follow these sorts of standard conventions.
It's not clear whether they actually boot anymore and if anyone still
has the respective hardware available to maintain them. I cannot really
fix and test them right now, but we should at least create a fake TTB
section for them so that common architecture code may make the correct
assumptions about which regions exist.
Change-Id: I51aa259fbb7a9c0ade72db905b1762c1c721f387
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/25903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/ti')
| -rw-r--r-- | src/cpu/ti/am335x/memlayout.ld | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/ti/am335x/memlayout.ld b/src/cpu/ti/am335x/memlayout.ld index a6f41ebe95..9efb710f34 100644 --- a/src/cpu/ti/am335x/memlayout.ld +++ b/src/cpu/ti/am335x/memlayout.ld @@ -25,6 +25,9 @@ SECTIONS STACK(0x4030be00, 4K) RAMSTAGE(0x80200000, 192K) + /* TODO: Implement MMU support and move TTB to a better location. */ + TTB(0x81000000, 16K) + #ifdef OMAP_HEADER .header : { *(.header); |