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authorDuncan Laurie <dlaurie@chromium.org>2013-06-20 14:53:35 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-05 19:28:41 +0100
commit414cd436c9f0f9606778890e1cbc88131732f3d2 (patch)
tree0989f4d64d46155d9a2ac4d79f2e24862fc9048d /src/cpu/ti
parent0db924d74cfec0e85ed4f9a01e519888d9f309b3 (diff)
Fix Makefile to include all copies of the SPD sources
On some systems there may be 2GB SKU that is the same as the 4GB SKU but just one channel of memory. In that case we need to ensure that both copies of the same SPD source end up populated by ensuring that repeated entries are included by using $+ instead of $^. Alternatively we could do the check inside romstage, but it is already set to behave this way if the SPD gets populated correctly. I changed spd_index to 3 in falco romstage to force it to pretend it was a 2GB config of the same memory, then booted to ensure it was indeed limited to 2GB. memcfg channel[0] config (00780008): ECC inactive enhanced interleave mode on rank interleave on DIMMA 2048 MB width x16 single rank, selected DIMMB 0 MB width x16 single rank memcfg channel[1] config (00600000): ECC inactive enhanced interleave mode on rank interleave on DIMMA 0 MB width x8 single rank, selected DIMMB 0 MB width x8 single rank Change-Id: Ibfe5051ccda2fe69e8caff3f3c264116e3411c65 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59483 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Jay Kim <yongjaek@chromium.org> Reviewed-on: http://review.coreboot.org/4319 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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