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authorGabe Black <gabeblack@chromium.org>2013-09-24 01:36:08 -0700
committerMartin Roth <martinroth@google.com>2016-04-10 18:18:07 +0200
commiteee6a7fa28566e1745319d608fcf4667bae57206 (patch)
tree9c6ab79f8baacf1dd92e4a7d2365174022640b8c /src/cpu/ti/am335x/gpio.c
parent8f251d9227a76a3f21ba31726adad7b196043e98 (diff)
am335x: Add some code for manipulating GPIOs
Add code for manipulating the GPIOs on the am335x. The API is patterned after the one used for the Exynos SOCs. Change-Id: I275317304bd0682f348f72f1c77ed5613065af3f Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: https://review.coreboot.org/3942 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/ti/am335x/gpio.c')
-rw-r--r--src/cpu/ti/am335x/gpio.c89
1 files changed, 89 insertions, 0 deletions
diff --git a/src/cpu/ti/am335x/gpio.c b/src/cpu/ti/am335x/gpio.c
new file mode 100644
index 0000000000..d4f7edfb72
--- /dev/null
+++ b/src/cpu/ti/am335x/gpio.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/ti/am335x/gpio.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+static struct am335x_gpio_regs *gpio_regs_and_bit(unsigned gpio, uint32_t *bit)
+{
+ unsigned bank = gpio / AM335X_GPIO_BITS_PER_BANK;
+
+ if (bank > ARRAY_SIZE(am335x_gpio_banks)) {
+ printk(BIOS_ERR, "Bad gpio index %d.\n", gpio);
+ return NULL;
+ }
+ *bit = 1 << (gpio % 32);
+ return am335x_gpio_banks[bank];
+}
+
+void am335x_disable_gpio_irqs(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(am335x_gpio_banks); i++)
+ write32(&am335x_gpio_banks[i]->irqstatus_clr_0, 0xffffffff);
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ uint32_t bit;
+ struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit);
+
+ if (!regs)
+ return -1;
+ setbits_le32(&regs->oe, bit);
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ uint32_t bit;
+ struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit);
+
+ if (!regs)
+ return -1;
+ if (value)
+ write32(&regs->setdataout, bit);
+ else
+ write32(&regs->cleardataout, bit);
+ clrbits_le32(&regs->oe, bit);
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ uint32_t bit;
+ struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit);
+
+ if (!regs)
+ return -1;
+ return (read32(&regs->datain) & bit) ? 1 : 0;
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ uint32_t bit;
+ struct am335x_gpio_regs *regs = gpio_regs_and_bit(gpio, &bit);
+
+ if (!regs)
+ return -1;
+ if (value)
+ write32(&regs->setdataout, bit);
+ else
+ write32(&regs->cleardataout, bit);
+ return 0;
+}