beaglebone: initial Kconfig and Makefiles

Initial structure of Beaglebone port

Change-Id: Ia255ab207f424dcd525990cdc0d74953e012c087
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3279
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 79 insertions, 0 deletions

diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
new file mode 100644
index 0000000000..c4ef8f1703
--- /dev/null
+++ b/src/cpu/ti/am335x/Kconfig
@@ -0,0 +1,79 @@
+config BOOTBLOCK_CPU_INIT
+	string
+	default "cpu/ti/am335x/bootblock.c"
+	help
+	  CPU/SoC-specific bootblock code. This is useful if the
+	  bootblock must load microcode or copy data from ROM before
+	  searching for the bootblock.
+
+# Example SRAM/iRAM map for Exynos5250 platform:
+#
+# 0x0202_3400: bootblock, assume up to 32KB in size
+# 0x0203_0000: romstage, assume up to 128KB in size.
+# 0x0207_8000: stack pointer
+
+# FIXME: find out where romboot places ml0/coreboot
+config BOOTBLOCK_BASE
+	hex
+	default 0xdeadbeef
+
+#config ROMSTAGE_BASE
+#	hex
+#	default 0x02030000
+#
+# FIXME: this is bullshit.
+config ROMSTAGE_SIZE
+	hex
+	default 0xa000
+
+# Stack may reside in either IRAM or DRAM. We will define it to live
+# at the top of IRAM for now.
+#
+# Stack grows downward, push operation stores register contents in
+# consecutive memory locations ending just below SP
+config STACK_TOP
+	hex
+	default 0x02078000
+
+config STACK_BOTTOM
+	hex
+	default 0x02077000
+
+config STACK_SIZE
+	hex
+	default 0x1000
+
+config CBFS_ROM_OFFSET
+	# Calculated by BL1 + max bootblock size.
+	hex "offset of CBFS data in ROM"
+	default 0x0A000
+
+## TODO Change this to some better address not overlapping bootblock when
+## cbfstool supports creating header in arbitrary location.
+config CBFS_HEADER_ROM_OFFSET
+	hex "offset of master CBFS header in ROM"
+	default 0x40
+
+## TODO We may probably move this to board-specific implementation files instead
+## of KConfig values.
+#config CBFS_CACHE_ADDRESS
+#	hex "memory address to put CBFS cache data"
+#	default 0x02060000
+#
+#config CBFS_CACHE_SIZE
+#	hex "size of CBFS cache data"
+#	default 0x000017000
+
+# FIXME: other magic numbers that should probably go away
+config XIP_ROM_SIZE
+	hex
+	default ROMSTAGE_SIZE
+
+config SYS_SDRAM_BASE
+	hex
+	default 0x40000000
+
+# FIXME: this can probably be smaller
+config COREBOOT_TABLES_SIZE
+	hex
+	default 0x800