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authorDavid Hendricks <dhendrix@chromium.org>2013-08-06 18:05:55 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 22:45:41 +0100
commit49c1be95d32f7106da2aef2c8f94709457081e7a (patch)
tree28801d6e0f6612d107522943f73ab8fd48a4268b /src/cpu/samsung
parente6789c139b3f2a098188ba48547dad46d0302e22 (diff)
exynos5420: set L2ACTLR parameters for A15 cores
This patch does the following for the A15 cores: - Disable clean/evict push to external - Enable hazard detect timout - Prevent gating the L2 logic clock This is ported from https://gerrit.chromium.org/gerrit/#/c/60154 Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I7ac9f40acecfa7daee6fb81772676bf5119d0536 Reviewed-on: https://gerrit.chromium.org/gerrit/64862 Commit-Queue: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4441 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/samsung')
-rw-r--r--src/cpu/samsung/exynos5420/cpu.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c
index 1940b88886..bda46de63d 100644
--- a/src/cpu/samsung/exynos5420/cpu.c
+++ b/src/cpu/samsung/exynos5420/cpu.c
@@ -198,4 +198,20 @@ void exynos5420_config_l2_cache(void)
*/
val = (1 << 9) | (0x2 << 6) | (1 << 5) | (0x2);
write_l2ctlr(val);
+
+ val = read_l2actlr();
+
+ /* L2ACTLR[3]: Disable clean/evict push to external */
+ val |= (1 << 3);
+
+ /* L2ACTLR[7]: Enable hazard detect timeout for A15 */
+ val |= (1 << 7);
+
+ /* L2ACTLR[27]: Prevents stopping the L2 logic clock */
+ val |= (1 << 27);
+
+ write_l2actlr(val);
+
+ /* Read the l2 control register to force things to take effect? */
+ val = read_l2ctlr();
}