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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-12-07 17:18:43 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-12-08 06:48:03 +0100
commit9fe20cb3814df88f181648860102a9da249a4da1 (patch)
tree3623451d939c151754dcec0e4f87ec27b5a44614 /src/cpu/samsung/s5p-common/Makefile.inc
parent747127d50545c1fbd0dcc10baacc742d3151ddfe (diff)
WIP: Initial support for Samsung Exynos 5250 ARM CPU
Samsung SoC files, including Exynos5 (a Cortex-A15 implementation). Since this is an SoC we'll forego the x86-style {north,south}bridge and cpu distinction. We may try to split some stuff out before the final version if prudent. Change-Id: Ie068e9dc3dd836c83d90e282b10d5202e7a4ba9b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2005 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/samsung/s5p-common/Makefile.inc')
-rw-r--r--src/cpu/samsung/s5p-common/Makefile.inc12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/cpu/samsung/s5p-common/Makefile.inc b/src/cpu/samsung/s5p-common/Makefile.inc
new file mode 100644
index 0000000000..9747f0d1ab
--- /dev/null
+++ b/src/cpu/samsung/s5p-common/Makefile.inc
@@ -0,0 +1,12 @@
+romstage-y += cpu_info.c
+romstage-y += pwm.c # needed by timer.c
+romstage-y += s5p_gpio.c
+romstage-y += timer.c
+
+#romstage-y += sromc.c
+#romstage-y += wdt.c
+
+ramstage-y += cpu_info.c
+ramstage-y += pwm.c # needed by timer.c
+ramstage-y += timer.c
+ramstage-y += s5p_gpio.c