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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-03-15 01:32:55 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-04-09 11:19:27 +0200
commitbbf6f3d384caf25efdfeca0fc5eaac13319a6a43 (patch)
tree4f4ae6c11cfef319ef2a91b02d70cd2b64639a0d /src/cpu/samsung/exynos5420
parentc2610a4a186c6e5a05f6518c2c7a734fde8f6cfd (diff)
console uart: Fill coreboot table entries
Also fixes the reported baudrate to take get_option() into account. Change-Id: Ieadad70b00df02a530b0ccb6fa4e1b51526089f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5310 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/samsung/exynos5420')
-rw-r--r--src/cpu/samsung/exynos5420/uart.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c
index 82b1265972..290eb35a8d 100644
--- a/src/cpu/samsung/exynos5420/uart.c
+++ b/src/cpu/samsung/exynos5420/uart.c
@@ -19,6 +19,7 @@
#include <console/uart.h>
#include <arch/io.h>
+#include <boot/coreboot_tables.h>
#include "uart.h"
#include "clk.h"
#include "cpu.h"
@@ -151,13 +152,6 @@ unsigned int uart_platform_base(int idx)
return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
}
-#if !defined(__PRE_RAM__)
-uint32_t uartmem_getbaseaddr(void)
-{
- return uart_platform_base(0);
-}
-#endif
-
void uart_init(void)
{
struct s5p_uart *uart = uart_platform_baseptr(0);
@@ -180,3 +174,16 @@ void uart_tx_flush(void)
{
/* Exynos5250 implements this too. */
}
+
+#ifndef __PRE_RAM__
+void uart_fill_lb(void *data)
+{
+ struct lb_serial serial;
+ serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
+ serial.baseaddr = uart_platform_base(0);
+ serial.baud = default_baudrate();
+ lb_add_serial(&serial, data);
+
+ lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
+}
+#endif