diff options
author | David Hendricks <dhendrix@chromium.org> | 2013-06-14 19:16:56 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 22:36:21 +0200 |
commit | 83fd23925509026734833c9d8d28890029899458 (patch) | |
tree | 6492c160d8b39e5fe96b84fbd174bc472d215a74 /src/cpu/samsung/exynos5420/i2c.h | |
parent | 1e3e2c51dba9b2c205985704aec77c89fcda7fdc (diff) |
exynos5420: update I2C code, add HSI2C/USI support
This updates the low-level I2C code to handle the new high-speed
HSI2C/USI inteface. It also outputs a bit more error information
when things go wrong. Also adds some more error prints. Timeouts
really need to be noted.
In hsi2c_wait_for_irq, order the delay so that we do an initial
sleep first to avoid an early-test that was kicking us out of the
test too soon. We got to the test before the hardware was ready
for us. Finally, test clearing the interrupt status register every time
we wait for it on the write. Works.
Change-Id: I69500eedad58ae0c6405164fbeee89b6a4c6ec6c
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3681
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/samsung/exynos5420/i2c.h')
-rw-r--r-- | src/cpu/samsung/exynos5420/i2c.h | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5420/i2c.h b/src/cpu/samsung/exynos5420/i2c.h index b14aa79afc..e8fe8201db 100644 --- a/src/cpu/samsung/exynos5420/i2c.h +++ b/src/cpu/samsung/exynos5420/i2c.h @@ -28,12 +28,49 @@ struct s3c24x0_i2c { u32 iicadd; u32 iicds; u32 iiclc; -}; +} __attribute__ ((packed)); + +struct exynos5_hsi2c { + u32 usi_ctl; + u32 usi_fifo_ctl; + u32 usi_trailing_ctl; + u32 usi_clk_ctl; + u32 usi_clk_slot; + u32 spi_ctl; + u32 uart_ctl; + u32 res1; + u32 usi_int_en; + u32 usi_int_stat; + u32 usi_modem_stat; + u32 usi_error_stat; + u32 usi_fifo_stat; + u32 usi_txdata; + u32 usi_rxdata; + u32 res2; + u32 usi_conf; + u32 usi_auto_conf; + u32 usi_timeout; + u32 usi_manual_cmd; + u32 usi_trans_status; + u32 usi_timing_hs1; + u32 usi_timing_hs2; + u32 usi_timing_hs3; + u32 usi_timing_fs1; + u32 usi_timing_fs2; + u32 usi_timing_fs3; + u32 usi_timing_sla; + u32 i2c_addr; +} __attribute__ ((packed)); struct s3c24x0_i2c_bus { int bus_num; struct s3c24x0_i2c *regs; enum periph_id periph_id; + struct exynos5_hsi2c *hsregs; + int is_highspeed; /* High speed type, rather than I2C */ + int id; + unsigned clk_cycle; + unsigned clk_div; }; void i2c_init(unsigned bus, int speed, int slaveadd); |