diff options
author | Martin Roth <martin.roth@se-eng.com> | 2013-07-08 16:23:54 -0600 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-11 22:36:59 +0200 |
commit | 4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c (patch) | |
tree | 6bd8440a05f6ea1184c0a5500d43cc92ab683f01 /src/cpu/samsung/exynos5250/spi.c | |
parent | 0cb07e3476d9408d0935253f9f26c0a8ddc28401 (diff) |
cpu: Fix spelling
Change-Id: I69c46648de0689e9bed84c7726906024ad65e769
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3729
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/samsung/exynos5250/spi.c')
-rw-r--r-- | src/cpu/samsung/exynos5250/spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/samsung/exynos5250/spi.c b/src/cpu/samsung/exynos5250/spi.c index 642ae23bb6..1c365dc5ca 100644 --- a/src/cpu/samsung/exynos5250/spi.c +++ b/src/cpu/samsung/exynos5250/spi.c @@ -42,7 +42,7 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo, unsigned int *rxp = (unsigned int *)(dinp + (i * (32 * 1024))); unsigned int out_bytes, in_bytes; - // TODO In currrent implementation, every read/write must be aligned to + // TODO In current implementation, every read/write must be aligned to // 4 bytes, otherwise you may get timeout or other unexpected results. ASSERT(todo % 4 == 0); @@ -90,7 +90,7 @@ int exynos_spi_open(struct exynos_spi *regs) SPI_MODE_CH_WIDTH_WORD | SPI_MODE_BUS_WIDTH_WORD); clrbits_le32(®s->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ - /* clear rx and tx channel if set priveously */ + /* clear rx and tx channel if set previously */ clrbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); setbits_le32(®s->swap_cfg, |