exynos5250: Get rid of the PWM timer code we shouldn't be using anymore

This code was left over from U-Boot and was superceded by the MCT.

Change-Id: Ia85e3b7281dcdd4740238dddd0dfc6f0ba2c94da
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63778
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4401
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

1 files changed, 10 insertions, 6 deletions

diff --git a/src/cpu/samsung/exynos5250/clock.c b/src/cpu/samsung/exynos5250/clock.c
index 390fae30f6..a89ceb393a 100644
--- a/src/cpu/samsung/exynos5250/clock.c
+++ b/src/cpu/samsung/exynos5250/clock.c
@@ -610,9 +610,8 @@ int clock_epll_set_rate(unsigned long rate)
 	unsigned int epll_con, epll_con_k;
 	unsigned int i;
 	unsigned int lockcnt;
-	unsigned int start;
-	struct exynos5_clock *clk =
-		samsung_get_base_clock();
+	struct mono_time current, end;
+	struct exynos5_clock *clk = samsung_get_base_clock();
 
 	epll_con = readl(&clk->epll_con0);
 	epll_con &= ~((EPLL_CON0_LOCK_DET_EN_MASK <<
@@ -646,14 +645,19 @@ int clock_epll_set_rate(unsigned long rate)
 	writel(epll_con, &clk->epll_con0);
 	writel(epll_con_k, &clk->epll_con1);
 
-	start = get_timer(0);
+	timer_monotonic_get(&current);
+	end = current;
+	mono_time_add_msecs(&end, TIMEOUT_EPLL_LOCK);
 
 	 while (!(readl(&clk->epll_con0) &
 			(0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) {
-		if (get_timer(start) > TIMEOUT_EPLL_LOCK) {
-			printk(BIOS_DEBUG, "%s: Timeout waiting for EPLL lock\n", __func__);
+		if (mono_time_after(&current, &end)) {
+			printk(BIOS_DEBUG,
+				"%s: Timeout waiting for EPLL lock\n",
+				__func__);
 			return -1;
 		}
+		timer_monotonic_get(&current);
 	}
 
 	return 0;