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author | Felix Held <felix-coreboot@felixheld.de> | 2024-08-02 23:42:41 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-07 16:39:22 +0000 |
commit | 20b79eca820c9eece0b85e1ec1434b9d5b8791d2 (patch) | |
tree | 8c32fa45323479eea36a21186fff6812bada836c /src/cpu/qemu-x86/qemu.c | |
parent | 8cfb73c777e2123189021c26929bc9faa75867d8 (diff) |
soc/amd/common/psp_smi_flash: implement SPI info command
Detect the block size of the SPI flash and number of flash blocks
reserved for the flash region corresponding to the 'target_nv_id' field
in the command buffer. This information is then written to the
corresponding fields in the command buffer. Since detecting the flash
chip still might result in accesses to it, make sure that it's available
for use and not currently used by an OS driver. Since this code is
inside the SMI handler, we don't have to worry about this code to be
interrupted, so we don't need to set some bit to tell other code that
we're currently using the SPI controller in the SMI handler.
This patch is a modified version of parts of CB:65523.
Document #55758 Rev. 2.04 was used as a reference.
Test=When selecting SOC_AMD_COMMON_BLOCK_PSP_SMI, Mandolin still builds
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Change-Id: I19041a27a9e8f901d42c3f60af834df625455ea6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83776
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/qemu-x86/qemu.c')
0 files changed, 0 insertions, 0 deletions