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authorRonald G. Minnich <rminnich@gmail.com>2003-06-24 19:44:00 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-06-24 19:44:00 +0000
commit1807c37418cbe777b738ba44a22b091e375fded6 (patch)
treea1a2195f1b8865181db061e6bd19bfec689bc220 /src/cpu/p5
parentdabc15feec808e588281fe4b6b87efb65a8b239e (diff)
Fixes to various config files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/p5')
-rw-r--r--src/cpu/p5/Config.lb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/p5/Config.lb b/src/cpu/p5/Config.lb
index 9d1d7f2a64..99858dbb29 100644
--- a/src/cpu/p5/Config.lb
+++ b/src/cpu/p5/Config.lb
@@ -1,5 +1,5 @@
-default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
-option i586=1
+uses CONFIG_UDELAY_TSC
+
object cpuid.o
if CONFIG_UDELAY_TSC object delay_tsc.o end
#object tsc.o