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authorShuo Liu <shuo.liu@intel.com>2024-03-21 00:11:10 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-07-03 20:55:02 +0000
commitd4985430e35f4dc2daa6930042cfa29cf2515133 (patch)
tree116918afb51a9effdea6443b7387c81b0e3aa67e /src/cpu/intel
parent1ee4d2f39c7c487a9094865de1f778a63a036a6b (diff)
soc/intel/xeon_sp/gnr: Add soc_pci_domain_fill_ssdt
Domain device objects are created with HID/CID/UID/_OSC/_PXM Dynamic domain SSDT generation could benefit the support of SoCs with multiple SKUs, or the case where one set of codes supports multiple SoCs. One possible side-effect might be the extra performance cost for generating these tables, which should not bring big impact on high performance server CPUs. GNR codes run with dynamic domain SSDT generation to fit for both GraniteRapids and SierraForest SoCs. TEST=Build on intel/avenuecity CRB TEST=Build on intel/beechnutcity CRB Change-Id: I28bfdf74d8044235f79f67d832860d8b4306670c Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81374 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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