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authorArthur Heymans <arthur@aheymans.xyz>2021-01-22 19:05:16 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-01 08:51:15 +0000
commit9daf5f071ca456348e658be409a07dd194259d2e (patch)
tree22f760f0a5b232d5938e0c781555d0055029bdd9 /src/cpu/intel
parent4330b961c472e359475bd17d56088c16e4a175b8 (diff)
cpu/intel/microcode: Reuse existing function to read MCU revision
Change-Id: If198fa68c0a29f46906151e667d7b00e2a3ab00d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/microcode/microcode.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 9d6d28b3e6..86739909c7 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -123,8 +123,8 @@ const void *intel_microcode_find(void)
size_t microcode_len;
u32 eax;
u32 pf, rev, sig, update_size;
- unsigned int x86_model, x86_family;
msr_t msr;
+ struct cpuinfo_x86 c;
if (ucode_updates)
return ucode_updates;
@@ -133,19 +133,13 @@ const void *intel_microcode_find(void)
if (ucode_updates == NULL)
return NULL;
- /* CPUID sets MSR 0x8B if a microcode update has been loaded. */
- msr.lo = 0;
- msr.hi = 0;
- wrmsr(IA32_BIOS_SIGN_ID, msr);
+ rev = read_microcode_rev();
eax = cpuid_eax(1);
- msr = rdmsr(IA32_BIOS_SIGN_ID);
- rev = msr.hi;
- x86_model = (eax >> 4) & 0x0f;
- x86_family = (eax >> 8) & 0x0f;
+ get_fms(&c, eax);
sig = eax;
pf = 0;
- if ((x86_model >= 5) || (x86_family > 6)) {
+ if ((c.x86_model >= 5) || (c.x86 > 6)) {
msr = rdmsr(IA32_PLATFORM_ID);
pf = 1 << ((msr.hi >> 18) & 7);
}