diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-02-15 11:06:10 +0100 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-16 07:05:59 +0000 |
commit | 876a1b48f87d0fe6d86ce22fb74b5c705bed6bcd (patch) | |
tree | 86c2410d21f5c0abacd5b1603c9e62f4165424b0 /src/cpu/intel | |
parent | ba00d10c41d1df1ca8a5eadc95a40430fbd059c5 (diff) |
arch/x86/postcar_loader.c: Change prepare_and_run_postcar signature
The postcar frame can now be a local variable to that function.
Change-Id: I873298970fff76b9ee1cae7da156613eb557ffbc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/car/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 85bc894afa..a307893c11 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -14,8 +14,6 @@ following as a guideline for acceptable stack usage. */ #define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000 -static struct postcar_frame early_mtrrs; - static void romstage_main(void) { int i; @@ -54,7 +52,7 @@ static void romstage_main(void) if (CONFIG(SMM_TSEG)) smm_list_regions(); - prepare_and_run_postcar(&early_mtrrs); + prepare_and_run_postcar(); /* We do not return here. */ } |