nb/intel/haswell: Add support for PEG

This means that any PCIe device placed in a PEG slot should now work.

During S3 resume, link training sometimes does not complete before
device enumeration. However, no tangible issues have been observed.
Fixing it would introduce a rather large delay in S3 resume.

There are a few minor shortcomings:

- Using PEG for display output is not yet supported.
- Only PEG2 is supported. An extra (unknown) training sequence is said to
  be needed for PEG3.
- The ACPI _PRT method is not yet generated, so legacy interrupt routing
  doesn't work for devices with multiple functions.

Tested on an ASRock H81M-HDS. Using a Radeon HD 6450 graphics card works
under GNU/Linux, with PRIME [1]. An x1 PCIe card was also tested in the
PEG slot, and it appears functional.

[1]: https://wiki.archlinux.org/index.php/PRIME

Change-Id: I786ecb6eccad8de89778af7e736ed664323e220e
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 2 insertions, 0 deletions

diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index a25f8836be..688f3579db 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -143,6 +143,8 @@ void romstage_common(const struct romstage_params *params)
 	#endif
 	}
 
+	haswell_unhide_peg();
+
 	setup_sdram_meminfo(params->pei_data);
 
 	romstage_handoff_init(wake_from_s3);