diff options
author | Julius Werner <jwerner@chromium.org> | 2020-12-07 15:00:07 -0800 |
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committer | Julius Werner <jwerner@chromium.org> | 2020-12-08 21:38:57 +0000 |
commit | b652aaef990cc3eb481dea7f8d4cc3eecd92ffa1 (patch) | |
tree | 81d887368eed27a91a1a92126c71df91a33ee14d /src/cpu/intel | |
parent | 364f9de1491cc48d8a03085a5748e81dcaea4a63 (diff) |
cbfs: Skip mcache in post-RAM stages before CBMEM is online
There have been a few issues with the new CBFS mcache code in stages
after romstage, where the mcache resides in CBMEM. In a few special
cases the stage may be doing a CBFS lookup before calling
cbmem_initialize(). To avoid breaking those cases, this patch makes the
CBFS code fall back to a lookup from flash if CBMEM hasn't been
reinitialized yet in those stages.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Icf6d1a1288cb243d0c4c893cc58251687e2873b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel')
0 files changed, 0 insertions, 0 deletions