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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-06 10:44:49 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-13 08:38:13 +0000 |
commit | 0377a369b9c34dd9e5e1002845e99d29dea55ca3 (patch) | |
tree | d85345dc447b2db608039b0b3c39d3d1e7619ac6 /src/cpu/intel | |
parent | 34856579f8e9349104cfdd0245a2b966bc59a7ea (diff) |
aopen/dxplplusu: Switch to C_ENVIRONMENT_BOOTBLOCK
This board is the only user of these ancient chipsets,
so we'll do all in one go.
Also wipe out some extra headers.
Change-Id: I22c172d577e6072562d8fcfa58145ec62473823e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/socket_mPGA604/Kconfig | 5 | ||||
-rw-r--r-- | src/cpu/intel/socket_mPGA604/Makefile.inc | 4 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index ab0cf8ab6e..ca2f7b36ee 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -10,6 +10,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy select SSE select UDELAY_TSC select SIPI_VECTOR_IN_ROM + select C_ENVIRONMENT_BOOTBLOCK # mPGA604 are usually Intel Netburst CPUs which should have SSE2 # but the ramtest.c code on the Dell S1850 seems to choke on @@ -26,4 +27,8 @@ config DCACHE_RAM_SIZE hex default 0x4000 +config DCACHE_BSP_STACK_SIZE + hex + default 0x2000 + endif # CPU_INTEL_SOCKET_MPGA604 diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 371f7a6b6b..9e3b8d75bf 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -7,6 +7,8 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading -cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S +bootblock-y += ../car/p4-netburst/cache_as_ram.S +bootblock-y += ../car/bootblock.c + postcar-y += ../car/p4-netburst/exit_car.S romstage-y += ../car/romstage.c |