diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-28 12:13:54 +0100 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-30 21:52:10 +0000 |
commit | 04008a9c14c086c6a2e9f7ba89c3363713d90689 (patch) | |
tree | 48cee8496559c91dd0e4085d891cc278640393ff /src/cpu/intel | |
parent | c54d14f5b45af0f64826c0a09eed3ab5740780ef (diff) |
cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl
Use acpigen_write_processor_cnot to implement notifications to the CPU.
Automatically generate \PPKG in SSDT.
Change-Id: Iecc54e94484f5f11e0ba8ef6d1d844276e484b4d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29886
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/model_2065x/acpi.c | 7 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/acpi.c | 7 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/acpi/cpu.asl | 77 |
3 files changed, 22 insertions, 69 deletions
diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 7de8b19a7d..514ea44ecb 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -331,6 +331,13 @@ void generate_cpu_entries(struct device *device) acpigen_pop_len(); } } + + /* PPKG is usually used for thermal management + of the first and only package. */ + acpigen_write_processor_package("PPKG", 0, cores_per_package); + + /* Add a method to notify processor nodes */ + acpigen_write_processor_cnot(cores_per_package); } struct chip_operations cpu_intel_model_2065x_ops = { diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 8e2c0d17f6..aca2277fa6 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -334,6 +334,13 @@ void generate_cpu_entries(struct device *device) acpigen_pop_len(); } } + + /* PPKG is usually used for thermal management + of the first and only package. */ + acpigen_write_processor_package("PPKG", 0, cores_per_package); + + /* Add a method to notify processor nodes */ + acpigen_write_processor_cnot(cores_per_package); } struct chip_operations cpu_intel_model_206ax_ops = { diff --git a/src/cpu/intel/model_206ax/acpi/cpu.asl b/src/cpu/intel/model_206ax/acpi/cpu.asl index a95c54a71c..6fad17f74e 100644 --- a/src/cpu/intel/model_206ax/acpi/cpu.asl +++ b/src/cpu/intel/model_206ax/acpi/cpu.asl @@ -14,84 +14,23 @@ * GNU General Public License for more details. */ -/* These devices are created at runtime */ -External (\_PR.CP00, DeviceObj) -External (\_PR.CP01, DeviceObj) -External (\_PR.CP02, DeviceObj) -External (\_PR.CP03, DeviceObj) -External (\_PR.CP04, DeviceObj) -External (\_PR.CP05, DeviceObj) -External (\_PR.CP06, DeviceObj) -External (\_PR.CP07, DeviceObj) +/* These come from the dynamically created CPU SSDT */ +External (\_PR.CNOT, MethodObj) -/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +/* Notify OS to re-read CPU tables */ Method (PNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x81) // _CST - Notify (\_PR.CP01, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x81) // _CST - Notify (\_PR.CP03, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x81) // _CST - Notify (\_PR.CP05, 0x81) // _CST - Notify (\_PR.CP06, 0x81) // _CST - Notify (\_PR.CP07, 0x81) // _CST - } + \_PR.CNOT (0x81) } -/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ +/* Notify OS to re-read CPU _PPC limit */ Method (PPCN) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x80) // _PPC - Notify (\_PR.CP01, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x80) // _PPC - Notify (\_PR.CP03, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x80) // _PPC - Notify (\_PR.CP05, 0x80) // _PPC - Notify (\_PR.CP06, 0x80) // _PPC - Notify (\_PR.CP07, 0x80) // _PPC - } + \_PR.CNOT (0x80) } -/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ +/* Notify OS to re-read Throttle Limit tables */ Method (TNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x82) // _TPC - Notify (\_PR.CP01, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x82) // _TPC - Notify (\_PR.CP03, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x82) // _TPC - Notify (\_PR.CP05, 0x82) // _TPC - Notify (\_PR.CP06, 0x82) // _TPC - Notify (\_PR.CP07, 0x82) // _TPC - } -} - -/* Return a package containing enabled processor entries */ -Method (PPKG) -{ - If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, - \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) - } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) - } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CP00, \_PR.CP01}) - } Else { - Return (Package() {\_PR.CP00}) - } + \_PR.CNOT (0x82) } |