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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-11-30 14:54:19 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:15:00 +0000 |
commit | 6fe488b45fdd3c656b0a9f2858423d20bf374007 (patch) | |
tree | 4b5c41f036383acc4585e1e12addc9a7d13a8405 /src/cpu/intel | |
parent | 8a34795e66ee017585d43ccb1c0e75dbcd27943e (diff) |
MAINTAINERS: Add Philipp Hug as reviewer for RISC-V
Philipp has been reviewing and writing RISC-V-related code for a while.
Change-Id: I3f2d3a61f66343a6e0350909edfe466d2ee6c089
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/cpu/intel')
0 files changed, 0 insertions, 0 deletions