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authorHung-Te Lin <hungte@chromium.org>2013-06-26 19:52:52 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:16:10 +0200
commit16cb01044010b4bd1bacad3160aebf91ebd86681 (patch)
tree78209d75a973d8bb185752683e56b248b0ea486c /src/cpu/intel/speedstep
parent0ee7062e305c6ba4457e1edf10de8d5b3b388a70 (diff)
armv7/exynos5420: Revise SPI device list in cpu.h
Add SPI0 and SPI2 to Exynos 5 SPI list, and correct structure names. Also removed the un-enumerated devices (SPI_BASE, base_spi()). Change-Id: Ica6d9a41f9619c8c61eab664d5e988dd4a428e09 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3708 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/speedstep')
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