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authorCaesar Wang <wxt@rock-chips.com>2017-06-22 16:14:58 +0800
committerMartin Roth <martinroth@google.com>2017-06-26 00:45:02 +0000
commita0199d8e1a96d94828b31f77e0a29a282871a76a (patch)
treede0547b24124e595108f7b18fbadabcd1f87b83e /src/cpu/intel/speedstep
parentd55f5ebe44ece4532ea28fe2c30a60bac8a7e81f (diff)
rockchip/rk3399: update the ddr 200MHz frequency configuration
This patch updates the coreboot DDR Settings to match the configuration used by ARM-Trusted-Firmware. Change-Id: I34bc2950a9708ac89a5637bf682551e03d993fcc Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://review.coreboot.org/20304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/cpu/intel/speedstep')
0 files changed, 0 insertions, 0 deletions