diff options
author | Kenji Chen <kenji.chen@intel.com> | 2014-09-26 02:48:16 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 17:27:47 +0200 |
commit | c373f503dbbfc2a70e91f576fac01f66126556c2 (patch) | |
tree | 2866ebb7d4d611d2fcbe149153bc849f6c66d508 /src/cpu/intel/speedstep | |
parent | 8ef55ee9969de3003eae9e3113b7497799ba14ec (diff) |
Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRC
OBFF: Disable it by clearing bit fields in that W/O register.
RO: Enable Relaxed Ordering from each enabled Root Port.
Linker Arbiter: Set it to recommended setting.
BUG=None
TEST=Build an image and check the setting are applied correctly on
Samus.
Signed-off-by: Kenji Chen <kenji.chen@intel.com>
Change-Id: I7a72217729d6f6ff5320738245c380c887c5912f
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 465b0a37c381930a4f0d74cd4fd69503a082911b
Original-Change-Id: I284e9eba1c2fceb690d3ef48b45a6f36d07ff84c
Original-Reviewed-on: https://chromium-review.googlesource.com/219993
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Commit-Queue: Kenji Chen <kenji.chen@intel.com>
Original-Tested-by: Kenji Chen <kenji.chen@intel.com>
Reviewed-on: http://review.coreboot.org/9210
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/intel/speedstep')
0 files changed, 0 insertions, 0 deletions