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author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2018-03-23 23:30:43 +0530 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-04 16:19:56 +0000 |
commit | 65d2d21a0435fdc993ca6272cf40fabe6aa13b99 (patch) | |
tree | eb114383926f9d41d2266eda109eecd7039dcf79 /src/cpu/intel/speedstep/acpi | |
parent | 2f828ebb59fe680ccc6d75793d8c411996130883 (diff) |
mb/google/octopus/variants/baseboard: Set PL1 and PL2 value
This patch sets PL1 value to ~6W. Here, 8W setting gives
a run-time 6W actual measured power.
Also, this patch sets PL2 value to 15W.
BUG=None
BRANCH=None
TEST=Build and read the MSR 0x610.
Change-Id: I2439a49b9917db0d9b05f333ce1c35003da493f6
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/25341
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/intel/speedstep/acpi')
0 files changed, 0 insertions, 0 deletions