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authorArthur Heymans <arthur@aheymans.xyz>2022-11-07 08:47:33 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-30 15:58:19 +0000
commitfade723b2551d12c98c91c968d213eeb827d856d (patch)
treef504f6adce43761ac9cb76498279fea0686074be /src/cpu/intel/speedstep/acpi
parent691d58f9996d2ff3820b2c08646e98f16bbde2ee (diff)
nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree
Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69291 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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