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authorDinesh Gehlot <digehlot@google.com>2024-07-30 12:53:50 +0530
committerFelix Held <felix-coreboot@felixheld.de>2024-08-02 14:44:10 +0000
commit5a70f8a09239415a612191d241354f9d223a7232 (patch)
tree8460155840e41742bc9922dc6db79a2937b22478 /src/cpu/intel/socket_p
parent896c76c5c1cadb35812d0a5867b293a8b1138b71 (diff)
soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag
The patch enforces CSE sync when the GBB flag GBB_FLAG_FORCE_CSE_SYNC is enabled and the system is currently booting from the RO section. Additionally, it integrates forced CSE sync into eSOL decision-making. BUG=b:353053317 TEST=Verified forced CSE sync on rex0 with GBB 0x200000 Cq-Depend: chromium:5718196 Change-Id: I228bc8ebf58719776f6c39e0bfbb7ad53d9bfb7f Signed-off-by: Dinesh Gehlot <digehlot@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83686 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/cpu/intel/socket_p')
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