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authorNico Huber <nico.huber@secunet.com>2019-02-27 14:32:23 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-28 13:48:58 +0000
commitc570a0e713abbe03280b2da461106806c9366e48 (patch)
tree291442a0716365208aec9af007da3f8514c323cc /src/cpu/intel/socket_p/Makefile.inc
parent1083a4d2324ce54f0a9f77098c8d7c23839c3849 (diff)
cpu/intel: Rename socket_mPGA478MN to socket_p
These marketing names are much easier to distinguish. My mnemonic: Socket M => up to Merom, Socket P => up to Penryn. Change-Id: I3c2a59596cf7f3cd763bd79962ad326ab080677b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/31645 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_p/Makefile.inc')
-rw-r--r--src/cpu/intel/socket_p/Makefile.inc15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc
new file mode 100644
index 0000000000..78d7c0ee58
--- /dev/null
+++ b/src/cpu/intel/socket_p/Makefile.inc
@@ -0,0 +1,15 @@
+subdirs-y += ../model_6fx
+subdirs-y += ../model_1067x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+subdirs-y += ../speedstep
+
+cpu_incs-y += $(src)/cpu/intel/car/core2/cache_as_ram.S
+postcar-y += ../car/p4-netburst/exit_car.S
+
+romstage-y += ../car/romstage.c