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authorVladimir Serbinenko <phcoder@gmail.com>2016-02-10 01:36:25 +0100
committerMartin Roth <martinroth@google.com>2016-02-12 04:20:57 +0100
commitffbb3c0b8abea621eb7a1583d630cf06c8cbfbbc (patch)
tree9a45adcee57358dd8ebafc4201db2cbd0beef679 /src/cpu/intel/socket_LGA775
parent622eea7e815af39dbee290eddc487baab5e8a5f5 (diff)
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Change-Id: I11e09804ed1d8a7ae8b8d4502bd18f6be933f9fa Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13656 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
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