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author | Liju-Clr Chen <liju-clr.chen@mediatek.com> | 2022-11-21 18:36:36 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-23 16:31:29 +0000 |
commit | e1ee23f29d9b0ca86bc29b540efa9290d7b40cb0 (patch) | |
tree | 499bd97d7372029149c707b5ac63d54b2e50bba4 /src/cpu/intel/socket_LGA775 | |
parent | 977673894ff486af2ff74ba5585ca6039701eb8f (diff) |
soc/mediatek: Add error handling for dptx_get_edid()
Skip eDP initialization when we failed to get EDID. This prevents the
PLL assertion in dp_intf_config() if the display could not be
initialized properly.
BUG=b:233720142
TEST=boot to depthcharge on MT8188 EVB.
Change-Id: I0fd672b175feb9b813c1d9ec4140e4273079ff07
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69858
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_LGA775')
0 files changed, 0 insertions, 0 deletions