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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-05 17:18:11 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-14 12:06:12 +0000 |
| commit | 48bf712d359451c9c754f2713be2268eddb19035 (patch) | |
| tree | fe0e06e83ae935d871dad8d0bd17c60a088b9521 /src/cpu/intel/smm/gen1 | |
| parent | 25176ef022bdd13864fb23d75066134b62d3abbb (diff) | |
cpu/intel/car/non-evict: Update microcode in CAR setup
On CPU's with a non eviction mode we cache the whole ROM to speed up
finding the microcode updates, remove the caching to fill in the non
eviction mode and then turn on caching the whole ROM again to speed
executing XIP code in flash.
Change-Id: Ib7f36678913e0ba8ef1305bca2c482f375b23eaf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30682
Reviewed-on: https://review.coreboot.org/c/30813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel/smm/gen1')
0 files changed, 0 insertions, 0 deletions