diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 12:05:38 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-25 09:18:22 +0000 |
| commit | 1fa240a3c5d2a6e8cd63eff24f227abc3333753b (patch) | |
| tree | 19b26ef5f947bc4d82461b20ec263d4feabbc1c9 /src/cpu/intel/slot_1/Kconfig | |
| parent | df0c731e688f55caf61fa721d32f1725e241aca5 (diff) | |
cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK
Console is not yet enabled in bootblock. This will be done in
a different CL.
Change-Id: Ic751d42a1969fb79fb50366f766d8796846a0bc4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel/slot_1/Kconfig')
| -rw-r--r-- | src/cpu/intel/slot_1/Kconfig | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 00af79a440..791997499d 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -27,7 +27,6 @@ config SLOT_SPECIFIC_OPTIONS # dummy select UDELAY_TSC select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE - select ROMCC_BOOTBLOCK config DCACHE_RAM_BASE hex @@ -37,4 +36,12 @@ config DCACHE_RAM_SIZE hex default 0x02000 +config DCACHE_BSP_STACK_SIZE + hex + default 0x1000 + +config C_ENV_BOOTBLOCK_SIZE + hex + default 0x2000 + endif |