diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2017-05-16 19:06:04 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2017-05-17 17:56:24 +0200 |
| commit | c5eab98e78878b25e01f374d63ab161555447c41 (patch) | |
| tree | e23f58e9d71877a075cc27901f25e2dd9605f497 /src/cpu/intel/model_f3x | |
| parent | 4f7d536ed375d6aafc7cc5971dc51a7bc4a021fb (diff) | |
mb/google/eve: Remove FPC device from SPI1
This device is no longer directly connected to the SOC so it
does not need to be enabled in coreboot.
BUG=b:35648259
TEST=build and boot on Eve
Change-Id: I4ed5a5575ce51ba5f6f48b54fab42e00134ea351
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/19728
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/intel/model_f3x')
0 files changed, 0 insertions, 0 deletions