diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/cpu/intel/model_6xx | |
parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_6xx')
-rw-r--r-- | src/cpu/intel/model_6xx/microcode_MU16810d.h | 6 | ||||
-rw-r--r-- | src/cpu/intel/model_6xx/microcode_MU16830c.h | 6 | ||||
-rw-r--r-- | src/cpu/intel/model_6xx/model_6xx_init.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/intel/model_6xx/microcode_MU16810d.h b/src/cpu/intel/model_6xx/microcode_MU16810d.h index ce207efa76..ef1ff7dd1d 100644 --- a/src/cpu/intel/model_6xx/microcode_MU16810d.h +++ b/src/cpu/intel/model_6xx/microcode_MU16810d.h @@ -1,12 +1,12 @@ /* - Copyright Intel Corporation, 1995, 96, 97, 98, 99, 2000. + Copyright Intel Corporation, 1995, 96, 97, 98, 99, 2000. - These microcode updates are distributed for the sole purpose of + These microcode updates are distributed for the sole purpose of installation in the BIOS or Operating System of computer systems which include an Intel P6 family microprocessor sold or distributed to or by you. You are authorized to copy and install this material on such systems. You are not authorized to use this material for - any other purpose. + any other purpose. */ /* MU16810d.inc */ diff --git a/src/cpu/intel/model_6xx/microcode_MU16830c.h b/src/cpu/intel/model_6xx/microcode_MU16830c.h index 2724e7bae4..602739c368 100644 --- a/src/cpu/intel/model_6xx/microcode_MU16830c.h +++ b/src/cpu/intel/model_6xx/microcode_MU16830c.h @@ -1,12 +1,12 @@ /* - Copyright Intel Corporation, 1995, 96, 97, 98, 99, 2000. + Copyright Intel Corporation, 1995, 96, 97, 98, 99, 2000. - These microcode updates are distributed for the sole purpose of + These microcode updates are distributed for the sole purpose of installation in the BIOS or Operating System of computer systems which include an Intel P6 family microprocessor sold or distributed to or by you. You are authorized to copy and install this material on such systems. You are not authorized to use this material for - any other purpose. + any other purpose. */ /* MU16830c.inc */ diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c index 7efdf2119e..6c795eab32 100644 --- a/src/cpu/intel/model_6xx/model_6xx_init.c +++ b/src/cpu/intel/model_6xx/model_6xx_init.c @@ -16,7 +16,7 @@ static uint32_t microcode_updates[] = { * microcode update lengths. They are encoded in int 8 and 9. A * dummy header of nulls must terminate the list. */ -#include "microcode_MU16810d.h" +#include "microcode_MU16810d.h" #include "microcode_MU16830c.h" /* Dummy terminator */ 0x0, 0x0, 0x0, 0x0, @@ -32,7 +32,7 @@ static void model_6xx_init(device_t dev) x86_enable_cache(); x86_setup_mtrrs(36); x86_mtrr_check(); - + /* Update the microcode */ intel_update_microcode(microcode_updates); |