summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_6xx
diff options
context:
space:
mode:
authorDan Elkouby <streetwalkermc@gmail.com>2018-09-03 18:34:07 +0300
committerPatrick Georgi <pgeorgi@google.com>2018-09-26 15:37:36 +0000
commitdfaff4d18a711f764c9198f488435fdc553dcea2 (patch)
tree79eae55c9e5339df76ce856921a7c60034b57176 /src/cpu/intel/model_6xx
parentce8763fb138afe8261301fc6a3638b7b18b381ac (diff)
cpu/intel/model_206ax: detect number of MCE banks
My CPU (3770k) supports 9 MCE banks, but the code is hardcoded to reset only 7. This causes Linux to spuriously log errors during boot and S3 resume. Fix this by reading the real value from the right MSR. Change-Id: Id05645009259fd77b4de49bde518361eeae46617 Signed-off-by: Dan Elkouby <streetwalkermc@gmail.com> Reviewed-on: https://review.coreboot.org/28443 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu/intel/model_6xx')
0 files changed, 0 insertions, 0 deletions