diff options
author | Joseph Smith <joe@settoplinux.org> | 2010-04-09 11:10:25 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 11:10:25 +0000 |
commit | 7488e049df9899dd7062b2ffe393b3e9a6f50dc5 (patch) | |
tree | a226c1f16a9220abb947ba46d26570e065494aa5 /src/cpu/intel/model_6ex/cache_as_ram_disable.c | |
parent | 853263b963b4cacb4f7fa3a7f2c68dcbd094f1d7 (diff) |
1. This patch adds CAR for Intel P6 series processors.
2. Add support for Micro-FCBGA 479 Celeron and PIII's
3. Add support for model_6bx and microcode updates
4. Add support for CAR and Tinybootblock on RCA RM4100 and Thomson
IP1000
Build and boot tested.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
The change to CAR reveiled a few more warnings in the ICH4 and i830 code,
I fixed them on the fly.
Checking this in because my last two commits broke Joseph's CAR patch. This
version fixes the issues.
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_6ex/cache_as_ram_disable.c')
-rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram_disable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c index 29e726a272..f859336adf 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c +++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c @@ -19,7 +19,7 @@ * MA 02110-1301 USA */ - +#include <arch/stages.h> /* called from assembler code */ void stage1_main(unsigned long bist); |