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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-25 20:03:42 +0100 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-22 12:16:18 +0000 |
commit | edbf5d913819726a09cd56bace2d13e74b560ab1 (patch) | |
tree | cd33c998831b53e838e255565aba3b97fdbc8a69 /src/cpu/intel/model_206ax/model_206ax.h | |
parent | d30894b835eb466e6e46c64317edf96e5554b138 (diff) |
cpu/intel/model_206ax: Use parallel MP init
This patch adds a few southbridge calls needed for parallel MP init.
Moves the smm_relocate() function to smm/gen1/smi.h, since that is
where this function is defined now.
Tested on Thinkpad X220, shaves off ~30ms on a 2 core, 4 threads CPU.
Change-Id: Ia1d547ed4a3cb6746a0222c3e54e94e5848b0dd7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/25618
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_206ax/model_206ax.h')
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 2bf9d32e46..f4c5d9323a 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -22,6 +22,7 @@ /* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ #define SANDYBRIDGE_BCLK 100 +#define CORE_THREAD_COUNT_MSR 0x35 #define MSR_FEATURE_CONFIG 0x13c #define MSR_FLEX_RATIO 0x194 #define FLEX_RATIO_LOCK (1 << 20) @@ -109,7 +110,6 @@ void intel_model_206ax_finalize_smm(void); /* Configure power limits for turbo mode */ void set_power_limits(u8 power_limit_1_time); int cpu_config_tdp_levels(void); -void smm_relocate(void); #endif int get_platform_id(void); |