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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-04 00:09:50 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-05 21:10:25 +0200 |
| commit | 5c55463f500528b69c47a06da22339fa85d70b7e (patch) | |
| tree | d36dfe145f135afa5453f6dd4fdbb32f14be5ef5 /src/cpu/intel/model_206ax/Makefile.inc | |
| parent | 00636b0daefc3c499990744226a0e1a316d71731 (diff) | |
Add support for Intel Sandybridge CPU
Change-Id: I9f37e291c00c0640c6600d8fdd6dcc13c3e5b8d5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/855
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/model_206ax/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/model_206ax/Makefile.inc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc new file mode 100644 index 0000000000..e9b8e6df8e --- /dev/null +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -0,0 +1,8 @@ +driver-y += model_206ax_init.c +subdirs-y += ../../x86/name + +ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c + +cpu_incs += $(src)/cpu/intel/model_206ax/cache_as_ram.inc |