diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2017-06-06 10:44:29 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-09 16:27:19 +0200 |
| commit | b9959e279c40b6db50efa61d20838757080fa4dd (patch) | |
| tree | 2076a6f8bbc9019c555a598d2a3bd5424e3462a0 /src/cpu/intel/model_206ax/Kconfig | |
| parent | 21e7424fc985f2f92ee7e9f505acd72c53035531 (diff) | |
cpu/intel/model_206ax: Use tsc monotonic timer
Switch from lapic to tsc.
Allows timestamps to be used in coreboot, as there's a reference
clock available to calculate correct time units.
Clean Kconfig, remove duplicated lapic code and include tsc dir for
LGA1155 boards.
Tested on Lenovo T430.
Change-Id: I849ca2b3908116d9d22907039cd6e4464444b1d1
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20044
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/model_206ax/Kconfig')
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 6c04fba829..f16b11962c 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -14,12 +14,13 @@ config CPU_SPECIFIC_OPTIONS select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_LAPIC + select UDELAY_TSC + select TSC_CONSTANT_RATE + select TSC_MONOTONIC_TIMER select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE - select LAPIC_MONOTONIC_TIMER select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT |