cpu/intel: Make all Intel CPUs load microcode from CBFS

The sequence to inject microcode updates is virtually the same for all
Intel CPUs. The same function is used to inject the update in both CBFS
and hardcoded cases, and in both of these cases, the microcode resides in
the ROM. This should be a safe change across the board.

The function which loaded compiled-in microcode is also removed here in
order to prevent it from being used in the future.

The dummy terminators from microcode need to be removed if this change is
to work when generating microcode from several microcode_blob.c files, as
is the case for older socketed CPUs. Removal of dummy terminators is done
in a subsequent patch.

Change-Id: I2cc8220cc4cd4a87aa7fc750e6c60ccdfa9986e9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4495
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>

4 files changed, 20 insertions, 19 deletions

diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 852c9cdf0c..7d5bf94918 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -3,3 +3,4 @@ config CPU_INTEL_MODEL_1067X
 	select SMP
 	select SSE2
 	select TSC_SYNC_MFENCE
+	select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_1067x/Makefile.inc b/src/cpu/intel/model_1067x/Makefile.inc
index c0e98bc353..ccfeb7feda 100644
--- a/src/cpu/intel/model_1067x/Makefile.inc
+++ b/src/cpu/intel/model_1067x/Makefile.inc
@@ -1,3 +1,4 @@
 ramstage-y += model_1067x_init.c
 subdirs-y += ../../x86/name
 
+cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/intel/model_1067x/microcode_blob.c b/src/cpu/intel/model_1067x/microcode_blob.c
new file mode 100644
index 0000000000..3b22e70233
--- /dev/null
+++ b/src/cpu/intel/model_1067x/microcode_blob.c
@@ -0,0 +1,17 @@
+unsigned microcode_updates_1067ax[] = {
+	#include "microcode-m011067660F.h"
+	#include "microcode-m041067660F.h"
+	#include "microcode-m101067660F.h"
+	#include "microcode-m101067770A.h"
+	#include "microcode-m111067AA0B.h"
+	#include "microcode-m401067660F.h"
+	#include "microcode-m441067AA0B.h"
+	#include "microcode-m801067660F.h"
+	#include "microcode-mA01067AA0B.h"
+
+	/*  Dummy terminator  */
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+};
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 47d87dea8b..2b151a3706 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -36,24 +36,6 @@
 
 #include "chip.h"
 
-static const uint32_t microcode_updates[] = {
-	#include "microcode-m011067660F.h"
-	#include "microcode-m041067660F.h"
-	#include "microcode-m101067660F.h"
-	#include "microcode-m101067770A.h"
-	#include "microcode-m111067AA0B.h"
-	#include "microcode-m401067660F.h"
-	#include "microcode-m441067AA0B.h"
-	#include "microcode-m801067660F.h"
-	#include "microcode-mA01067AA0B.h"
-
-	/*  Dummy terminator  */
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-        0x0, 0x0, 0x0, 0x0,
-};
-
 static void init_timer(void)
 {
 	/* Set the apic timer to no interrupts and periodic mode */
@@ -335,7 +317,7 @@ static void model_1067x_init(device_t cpu)
 	x86_enable_cache();
 
 	/* Update the microcode */
-	intel_update_microcode(microcode_updates);
+	intel_update_microcode_from_cbfs();
 
 	/* Print processor name */
 	fill_processor_name(processor_name);